New Electronics

In this article featured in New Electronics we examine how traditional packaging still has a key role to play in both deep space and new space applications.

 

New Space and Beyond


 

Innovators in aerospace are again turning to this proven packaging option to tap into both compliance and reliability.


At the start of space exploration, Transistor Outline (TO) JEDEC packages were the go-to packages of choice for the exploration industry. The TO package family consists of many types of packaging solutions for transistors and similar discrete devices as well as simple IC’s with low pin counts. The structures of TO packages can vary widely, from expensive metal can enclosures to low-cost plastic-moulded package bodies.

TO-18 and TO-5 devices became the preferred option for small signal componentry, where TO-66 and TO-3 packages were recognised as ideally suited for high-voltage and high-power applications.

However, the difficulties experienced in the selection of TO-66 and TO-3 packages have resulted in the wider adoption of more modern metal case hermetic packages such as TO-257, TO-254, and TO-258 – in comparison, these are far easier to deploy than their more traditional case counterparts.

Yet the continued evolution of the wider electronics industry has seen these hermetic devices subsequently displaced by surface mount equivalents over the last twenty years.

Commonly selected UA and UB packages are utilised for small signal use, while SMD-05 and SMD-1 are chosen across numerous markets for applications demanding increased power.

On this landscape – and with the emergent era of space commercialisation – system designers may be wondering if there is still a place for the more traditional metal case devices.

Well, there is, and innovators in aerospace are again turning to this proven packaging option to tap into both compliance and reliability.

At the start of the space industry, many if not all circuit boards were made of ceramic material. The movement towards more commercial missions and the movement into New Space today means that often boards consist of FR4 board.

The attachment of large-scale surface mount parts has already raised an element of concern from ESA who have noted in their Space Product Assurance Classification, ECSS-Q-ST-70-38C, that component suppliers must deliver CTE compliance when employed within Class 1 boards (i.e., glass bre epoxy or glass bre polyimide resins).

Packages such as UA and UB do empower a low mass advantage, however this benefit demands careful soldering of the devices, a challenging real-world requirement. Further, SMD- 05 and SMD-1 packages may also have more issues due to their large surface area and larger mass. The chances of stress fractures along joint areas is significant and generates a genuine risk of catastrophic failure of the device and an early end to the mission. SMD packages are also widely acknowledged to have issues with cracking if mounted above a large ground plane and subjected to extensive thermal cycles. One potential solution to this problem is adopting a CTE compliant mounted package or carrier featuring dual lead connections, as can be seen in Figure 1 below.

Traditional leaded packages should of course be used with care as additional lead length over surface mount packages can cause stray inductances which could affect switching performances; this can be mitigated by careful circuit layout, thus preventing oscillation within the circuit.

In comparison, proven metal case transistors reliably offer some degree of compliance. The leads act as an expansion route during thermal shocks. Typically, metal case transistors are better at dissipating heat generated within the system, especially as switching applications become quicker and chips become smaller and reach their respective control limitations.

Often these traditional packages have a gold ash on the lead termination; where a gold ash is present additional consideration should be given while using these products.

It is known that gold contamination within the PCB soldering connection can lead to embrittlement of the joint, which could contribute to premature failure of the component when used in harsh conditions. To prevent such circumstance, it is essential that the gold ash be removed prior to assembly.

As many parties choose to use commercial ‘off the shelf’ components these will typically be solder dipped with RoHS compliant sac type solders; however, when using these in critical applications, lead finished solders should be considered. Lead, although a non-preferred medium, is often approved under the RoHS status by exception. Within military, avionic and space applications it is common for lead to be the solder of choice due to reliability factors in difficult environments.

It is for the same reason that tinplated terminations on plastic devices are often not used because of the known risk of tin whiskers which can short out transistors within in a minimal period.

The use of leaded solders in termination within the system can add to increased reliability; it is worth nothing that when producing the PCB, it is imperative that the two RoHS compliant and non-RoHS compliant solder assembly (i.e. through wave soldering or reflow systems) are manufactured separately to prevent cross contamination of sac and leaded solder.

Long-term value in upgradability

System designers may also find that metal transistors enable a much easier route to upgrade when contrasted with surface mount options. The plastic TO-220 package, for example, has an identical footprint to that of the TO-257. This aids early prototyping, using low cost components, creating a design that can easily and efficiently be transferred to more robust packaging optimised for harsher environments.

 

Pad Asignments


Figure 1 - A CTE Compliant mounted package or carrier, featuring dual lead connections, can help solve the problem of cracking
 

As higher volume satellite constellations in low earth orbit are driving a requirement for increasingly cost-effective components, this is a tangible advantage.

Even as some semiconductor manufacturers are exiting the TO package space marketplace, there are providers that will continue to offer a choice of components and test routing. In this fourth age of space, creative and successful designs may demand either or both metal case leaded devices or surface mount technologies to support the mission, both of which must be tested in accordance to Mil standards or ESA specifications.

With cost considerations an increasingly high priority, screening options such as NS1 and NS2 can cost effectively deliver the reliability required. The NS1 sequence provides an assurance basis with manufacture utilising robust, controlled, space-proven processes and designs, including traceability to all materials and operations. NS2 adds baseline mechanical and electrical screening to provide the next level of assurance.

Most importantly, TO solutions offer an option to fully utilise packages in an optimised configuration, including the ability to mix technologies or manufacturers’ die within the package.

Conclusion

In conclusion, traditional packages do have a significant part to play in the space market, mitigating the risk of poor soldering of surface mount packages onto PCBs where visual inspection is not easily undertaken. The leaded component can normally be examined right around its circumference.

Looking For New Space Electronics®?